We offer seminar topics and bachelor’s and master’s thesis projects in high-performance scientific computing, parallel algorithms, numerical methods, and hardware-aware optimization.

Seminar Topics

Numerics

  • Interface and Performance of Ginkgo: Examine Ginkgo’s interface and performance for solving sparse linear systems, focusing on its separation of core algorithms from architecture-specific backends (contact: Fabian Osyguß).

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    Use a small sparse linear-system example to explain how solvers, preconditioners, and execution backends are selected through Ginkgo’s interface. Compare suitable configurations, separating setup and data-transfer costs from solver execution time.

  • Space Filling Curves is All You Need: Communication-Avoiding Matrix Multiplication Made Simple: Investigate how space-filling curves improve data locality in matrix multiplication while reducing dependence on platform-specific and matrix-shape-specific tuning (contact: Wilfredo Colmenares).

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    Explain how the traversal order maps matrix blocks to memory accesses and which opportunities for reuse it creates. Compare the approach with conventional blocking on different matrix shapes, considering both communication costs and implementation complexity.

  • Emulating High-precision Matrix Operations on Low-precision Matrix Engines: Study techniques such as the Ozaki schemes and compensated summation for emulating higher-precision matrix operations using lower-precision tensor cores (contact: Xingjian Qi).

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    Explain how operand splitting and compensated accumulation can combine lower-precision operations into a more accurate result. Compare the numerical error and computational overhead of selected approaches using matrices with different scales and conditioning.

Languages and Programming Models

  • C++23 Ranges and Views: Explore how C++ ranges and views improve composability and simplify working with sequences compared with iterator-based approaches (contact: Wilfredo Colmenares).

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    Use examples of filtering, transformation, and composition to explain lazy evaluation and the lifetime constraints of views. Compare equivalent range-based and iterator-based implementations for readability, generated code, and runtime overhead.

  • Julia in the Field of HPC: Evaluate Julia as an alternative to C, C++, and Fortran for HPC, considering usability, LLVM support, hardware interoperability, and performance (contact: Alessandro Biagiotti).

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    Choose a representative numerical kernel and examine its implementation, compilation behavior, and integration with existing libraries or accelerator tools. Evaluate performance alongside development effort, distinguishing compilation and startup costs from repeated execution.

  • Rust: Future in HPC: Assess Rust’s suitability for HPC through its memory safety, concurrency model, developer experience, and zero-cost abstractions (contact: Fabian Osyguß).

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    Use a parallel numerical example to examine how ownership and borrowing interact with shared data and concurrent execution. Discuss library support and interoperability, and compare implementation effort and performance with an established HPC approach.

  • Frontend for Scientific Computing DSLs: Explore accessible alternatives to C++ frontends for scientific domain-specific languages to reduce barriers to adoption (contact: Alessandro Biagiotti).

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    Compare ways to express a small set of scientific computations through alternative language interfaces. Examine how each interface exposes domain concepts, reports errors, and passes information to an optimizing backend while remaining accessible to users.

  • Reflecting on Reflection: Examine how C++ reflection can simplify complex template-heavy code and support compile-time computation (contact: Alessandro Biagiotti).

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    Study reflection mechanisms through examples such as inspecting members, generating repetitive code, and checking interfaces at compile time. Compare them with existing template techniques, considering clarity, compiler support, and compilation cost.

Tools and Libraries

  • Highway: Portable SIMD/Vector Intrinsics in C++: Study how the Highway library provides portable access to SIMD and vector instructions for efficient processing of multiple data items (contact: Xingjian Qi).

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    Implement a small numerical kernel using Highway and examine how vector widths, memory access, and remaining elements are handled. Compare it with scalar or compiler-vectorized code, discussing portability and performance across the available targets.

Performance and Parallel Algorithms

  • The Problem of Loop Fusion: Investigate algorithms, computational complexity, and data structures for reordering scientific computations to maximize loop fusion (contact: Alessandro Biagiotti).

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    Explain when data dependencies permit loops to be fused and when fusion conflicts with other execution constraints. Compare strategies for choosing a fusion order, considering their computational complexity and effects on memory traffic and parallelism.

Master’s and Bachelor’s Thesis

Numerics

  • Relative Precision Types: Explore numeric types that control precision according to the relative accuracy required by a computation.

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    Design an interface for expressing relative accuracy requirements and investigate how these requirements guide the choice of representation or arithmetic. Evaluate accuracy and runtime on computations with changing magnitudes, including cases involving cancellation or values near zero.

  • High Precision Accumulator Type: Design and evaluate an accumulator type that reduces numerical error when summing many values.

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    Develop an accumulator for summing values with widely differing magnitudes and investigate its use in parallel reductions. Compare error, reproducibility, memory use, and throughput with conventional accumulation on representative inputs.

  • Fast Tree Preconditioners: Develop efficient tree-based preconditioners to accelerate the iterative solution of linear systems.

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    Investigate how a tree structure can support inexpensive preconditioner construction and application. Compare candidate designs using setup cost, iteration count, total solution time, and parallel scalability on selected sparse systems.

Data Types and Containers

  • Self-parallelising Types: Explore data types that encapsulate parallel execution so that operations can exploit parallel hardware with less explicit coordination.

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    Prototype types whose operations choose and manage parallel execution internally while exposing a simple interface. Study execution thresholds, data ownership, and synchronization, measuring when automatic parallelism offsets its coordination overhead.

  • SoA Container of bitset<> with Bit/Byte-serial Arithmetic: Design a structure-of-arrays container for bitsets and investigate arithmetic that processes values one bit or byte at a time.

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    Design a layout that groups corresponding bits or bytes from many values and implement selected arithmetic operations on that representation. Compare carry handling, memory traffic, and throughput with conventional layouts across different value widths and batch sizes.

  • SoA Container of variant<>: Investigate structure-of-arrays layouts for containers of variant values to improve data organization and access efficiency.

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    Design a container that separates type tags and stored values while retaining a usable interface for heterogeneous elements. Evaluate access, iteration, and updates for different mixtures of alternatives, including their effects on memory use and vectorization.

  • Variant of Containers: Explore representing alternative container types within a variant and evaluate the implications for flexibility, memory layout, and performance.

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    Investigate selecting between whole container representations through a variant and define an interface for their shared operations. Compare this design with storing variants element by element, focusing on dispatch cost, layout flexibility, and representative access patterns.

  • Queue Adapting Vector: Investigate how a vector-based container can adapt to queue-like access patterns while maintaining efficient insertion, removal, and storage.

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    Prototype a vector-based container for workloads that append elements and repeatedly remove them from the front. Compare strategies for reclaiming space and maintaining locality, measuring allocation, data movement, and throughput against standard containers.

  • vector<>/deque<> and insert(): Compare insertion strategies for vectors and deques, focusing on data movement, allocation, and performance across usage patterns.

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    Benchmark individual and batched insertions at different positions and with different element sizes. Relate the results to allocation and data movement, and examine iterator invalidation and memory use when identifying suitable insertion strategies.

Performance and GPU Algorithms

  • Memory Access Patterns on CPUs and GPUs: Analyze how memory access patterns affect performance on CPUs and GPUs and identify layouts suited to each architecture.

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    Build small benchmarks for contiguous, strided, and irregular access patterns, varying alignment, layout, and working-set size. Use the measurements to explain cache behavior and GPU memory coalescing and derive recommendations for the tested hardware.

  • Guidelines for Stencil Codes: Develop practical guidelines for implementing efficient stencil computations, focusing on data layout, locality, and parallel execution.

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    Compare baseline stencil implementations with spatial blocking, temporal blocking, and alternative parallel decompositions. Study boundary handling and different grid sizes, then turn the measured trade-offs into practical implementation guidelines.

  • Histogram on the GPU: Implement and evaluate GPU histogram algorithms with attention to parallel updates, contention, and memory efficiency.

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    Compare histogram implementations using direct atomic updates, private intermediate histograms, and combinations of these approaches. Vary the number of bins and input distribution to examine contention, memory overhead, and parallel scalability.

  • Graph Coloring on the GPU: Investigate parallel graph coloring algorithms on GPUs and evaluate their runtime, synchronization costs, and coloring quality.

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    Implement and compare parallel coloring strategies, including how they detect and resolve conflicting assignments. Evaluate graphs with different structures, checking coloring validity and balancing runtime, synchronization costs, and the number of colors used.

Propose Your Own Topic

We welcome your own ideas for seminar topics and bachelor’s or master’s theses that fit our research areas. Get in touch to discuss your interests and explore a suitable topic together.